date | project | content | link |
|---|
| 21 min ago | llvm | Commit by bwilson :: r 99065 /llvm/trunk/lib/Target/ARM/ARMInstrNEON.td: ( link) Add instructions for double-spaced VLD3 and VLD4 without address register writeback, and refactor the existing double-spaced VLD2 instructions. These are only for the disassembler since codegen doesn't use them, at least for now. | # |
| 37 min ago | llvm | Commit by bwilson :: r 99062 /llvm/trunk/lib/Target/ARM/ARMInstrNEON.td: ( link) Add VLD1 instructions with address register writeback. | # |
| 54 min ago | llvm | Commit by d0k :: r 99061 /llvm/trunk/lib/Target/PIC16/AsmPrinter/ (PIC16AsmPrinter.cpp PIC16AsmPrinter.h): ( link) PIC16: Simplify code by using a std::set<std::string> instead of a sorted & uniqued std::list of leaked char*. | # |
| 06:34 today | llvm | Commit by bwilson :: r 99049 /llvm/trunk/lib/Target/ARM/ARMInstrVFP.td: ( link) Revert the rest of 98679. --- Reverse-merging r98679 into 'lib/Target/ARM/ARMInstrVFP.td': U lib/Target/ARM/ARMInstrVFP.td | # |
| 06:05 today | llvm | Commit by bwilson :: r 99043 /llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp: ( link) Fix a very bad typo. Since the register number was off by one, the ARM load/store optimizer would incorrectly think that registers D26 and D28 were consecutive and would generate a VLDM instruction to load them. The assembler was not convinced. | # |
| 03:53 today | llvm | Commit by djg :: r 99036 /llvm/trunk/ (2 files in 2 dirs): ( link) Clear the SCEVExpander's insertion point after making deletions, so that the SCEVExpander doesn't retain a dangling pointer as its insert position. The dangling pointer in this case wasn't ever used to insert new instructions, but it was causing trouble with SCEVExpander's code for automatically advancing its insert position past debug intrinsics.
This fixes use-after-free errors that valgrind noticed in test/Transforms/IndVarSimplify/2007-06-06-DeleteDanglesPtr.ll and test/Transforms/IndVarSimplify/exit_value_tests.ll. | # |
| 03:17 today | llvm | Commit by evancheng :: r 99033 /llvm/trunk/test/CodeGen/X86/sibcall.ll: ( link) Stupid svn. Add back to the lost sibcall tests. | # |
| 02:58 today | llvm | Commit by evancheng :: r 99032 /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp: ( link) If call result is in ST0 and it is not being passed to the caller's caller, then it is not safe to optimize the call into a sibcall since the call result has to be popped off the x87 stack. | # |
| 01:58 today | llvm | Commit by ddunbar :: r 99031 /llvm/trunk/lib/MC/MachObjectWriter.cpp: ( link) Better fix for r98994, MachObjectWriterImpl wasn't intended to be virtual. | # |
| 00:17 today | llvm | Commit by johnny :: r 99014 /llvm/trunk/lib/Target/ARM/ARMInstrFormats.td: ( link) Add NLdStFrm Format. | # |
| 23:50 yesterday | llvm | Commit by johnny :: r 99013 /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td: ( link) Revert r98679. The disassembler will be updated to depend on the existence of IndexModeUpd and then populates the Inst{21}=1 while populating the instructions for disassembly. | # |
| 23:04 yesterday | llvm | Commit by echristo :: r 99011 /llvm/trunk/utils/TableGen/ (3 files): ( link) Revert r99009 temporarily it seems to be breaking the bots. | # |
| 22:51 yesterday | llvm | Commit by bwilson :: r 99010 /llvm/trunk/lib/Target/ARM/ (6 files): ( link) Revert this change, since it was causing ARM performance regressions.
--- Reverse-merging r98889 into '.': U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/ARMISelLowering.h U lib/Target/ARM/ARMInstrInfo.td U lib/Target/ARM/ARMInstrVFP.td U lib/Target/ARM/ARMISelLowering.cpp U lib/Target/ARM/ARMInstrFormats.td | # |
| 22:40 yesterday | llvm | Commit by lattner :: r 99009 /llvm/trunk/utils/TableGen/ (3 files): ( link) Change intrinsic result type for void to store it as an empty list instead of as a single element list with VoidTy. | # |
| 21:56 yesterday | llvm | Commit by lattner :: r 99003 /llvm/trunk/utils/TableGen/ (2 files): ( link) make getOperandNum a static function (since it's just used by ApplyTypeConstraint) and make it handle multiple result nodes. | # |
| 21:51 yesterday | llvm | Commit by djg :: r 99001 /llvm/trunk/ (2 files in 2 dirs): ( link) Fix more places to more thoroughly ignore debug intrinsics. This fixes use-before-def errors in SCEVExpander-produced code in sqlite3 when debug info with optimization is enabled, though the testcases for this are dependent on use-list order. | # |
| 21:43 yesterday | llvm | Commit by lattner :: r 99000 /llvm/trunk/lib/Target/X86/ (X86Instr64bit.td X86InstrInfo.td): ( link) remove the patterns that I commented out in r98930, Dan verified that they are dead. | # |
| 21:37 yesterday | llvm | Commit by lattner :: r 98999 /llvm/trunk/utils/TableGen/ (5 files): ( link) major surgery on tblgen: generalize TreePatternNode to maintain a list of types (one for each result of the node) instead of a single type. There are liberal hacks added to emulate the old behavior in various situations, but they can start disolving now. | # |
| 21:31 yesterday | llvm | Commit by criswell :: r 98998 /llvm/trunk/ (autoconf/configure.ac configure): ( link) Force configuration of some projects before others. In particular, some projects rely upon llvm-gcc, the LLVM test suite, and poolalloc. This ensures that the aforementioned projects have their object trees created first so that other projects can find their object trees when they themselves are configured. | # |
| 21:26 yesterday | llvm | Commit by rafael :: r 98994 /llvm/trunk/lib/MC/MachObjectWriter.cpp: ( link) Fix -Wnon-virtual-dtor warning. | # |